Difference between revisions of "Module:Address"
From ALttP Speedrunning Wiki
Line 38: | Line 38: | ||
length = 2 | length = 2 | ||
elseif addr10short <= 0x1FFF then | elseif addr10short <= 0x1FFF then | ||
− | title = ' | + | title = 'WRAM mirror' |
+ | length = 4 | ||
+ | elseif addr10short <= 0x20FF then | ||
+ | title = 'Open bus' | ||
+ | length = 4 | ||
+ | elseif addr10short <= 0x21FF then | ||
+ | title = 'Hardware register (PPU)' | ||
+ | length = 4 | ||
+ | elseif addr10short == 0x4016 or addr10short == 0x4017 then | ||
+ | title = 'Control register' | ||
+ | length = 4 | ||
+ | elseif addr10short <= 0x41FF then | ||
+ | title = 'Open bus' | ||
+ | length = 4 | ||
+ | elseif addr10short <= 0x421F then | ||
+ | title = 'Hardware register (CPU)' | ||
+ | length = 4 | ||
+ | elseif addr10short <= 0x42FF then | ||
+ | title = 'Open bus' | ||
+ | length = 4 | ||
+ | elseif addr10 <= 0x437F then | ||
+ | title = 'Hardware register (CPU DMA)' | ||
length = 4 | length = 4 | ||
elseif addr10short <= 0x7FFF then | elseif addr10short <= 0x7FFF then | ||
− | title = ' | + | title = 'Open bus' |
− | |||
− | |||
− | |||
length = 4 | length = 4 | ||
else | else | ||
− | title = string.format('Long address: Bank $%02X; $%04X', bank, addr10short) | + | if bank == 0x7E then |
+ | title = string.format('WRAM bank 0 $%02X:%04X', bank, addr10short) | ||
+ | elseif bank == 0x7F then | ||
+ | title = string.format('WRAM bank 1 $%02X:%04X', bank, addr10short) | ||
+ | else | ||
+ | title = string.format('Long address: Bank $%02X; $%04X', bank, addr10short) | ||
+ | end | ||
length = 6 | length = 6 | ||
end | end |
Latest revision as of 15:14, 23 July 2021
Documentation for this module may be created at Module:Address/doc
local p = {} local HEX = require('Module:Base convert') function p.main(frame) local args = frame:getParent().args local addr = args[1] or 'FF' local size = args[2] or 1 addr = addr:gsub('%$', '') local suffix = args.s or '' local trimmed, title, len = p._main(addr, size) local ret = mw.html.create('code') :attr('title', title) :wikitext(trimmed) :wikitext(len) :wikitext(suffix) return ret end function p._main(addr, size) local addr10 = tonumber(HEX._convert(addr, 10, 16)) local addr10short = addr10 % 0x10000 local bank = (addr10 - addr10short) / 0x10000 local size10 = tonumber(HEX._convert(size or 1, 10, 16)) local title = '' local length = 0 local len = '' if addr10short <= 0xFF then title = 'Direct Page address' length = 2 elseif addr10short <= 0x1FFF then title = 'WRAM mirror' length = 4 elseif addr10short <= 0x20FF then title = 'Open bus' length = 4 elseif addr10short <= 0x21FF then title = 'Hardware register (PPU)' length = 4 elseif addr10short == 0x4016 or addr10short == 0x4017 then title = 'Control register' length = 4 elseif addr10short <= 0x41FF then title = 'Open bus' length = 4 elseif addr10short <= 0x421F then title = 'Hardware register (CPU)' length = 4 elseif addr10short <= 0x42FF then title = 'Open bus' length = 4 elseif addr10 <= 0x437F then title = 'Hardware register (CPU DMA)' length = 4 elseif addr10short <= 0x7FFF then title = 'Open bus' length = 4 else if bank == 0x7E then title = string.format('WRAM bank 0 $%02X:%04X', bank, addr10short) elseif bank == 0x7F then title = string.format('WRAM bank 1 $%02X:%04X', bank, addr10short) else title = string.format('Long address: Bank $%02X; $%04X', bank, addr10short) end length = 6 end local ret = string.format('$%0'..length..'X', addr10) if size10 > 1 then len = string.format('[0x%X]', size10) title = title .. string.format('; 0x%X bytes (%s bytes) in length', size10, size10) end return ret, title, len end return p